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San Diego
Payaso Plaza,
58, High-way, 9th floor,,
Los Angeles
Home: (444) 555-1234
San.Diego@abc.com

EXPERIENCE:


  • Starr computer,Inc
    Rochester, NY
    1990 to present
    Senior Hardware engineer
    Designed intelligent cache coherent future bus+ single board computer running VxWorks Real-Time OS on an Intel 80960CA with Ethernet SCSI, and serial ports.
    1. Defined the architecture for the I/O board.
    2. Simulated the design with RTL and Verilog.
    3. Debugged the board and system.

  • 1987-1990 Browning Corporation
    Buffalo, NY
    Senior hardware Engineer (1989-1990)
    Lead a design group for a 30K gateLSI100Kgate array for I/O.
    1. Created a gate array design environment using Synopsis and Verilog.
    2. Designed the Ethernet interface and port of the I/O gate Array.
    3. Defined the I/O for a low cost Magnus 88110 system with EISA.

  • Hardware Engineer II (1987-1989)
    Designed the part of the first Magnus 88000 based workstation.
    1. Defined the I/O interface.
    2. Designed the Ethernet interface.
    3. Developed the PROM I/O drivers for graphics and keyboard.

  • Purdue University
    West Lafayette, IN
    Graduate Research Assistant 1986-1987
    Programmed part of a single user PLATO operating system.
    1. Wrote I/O device drivers, graphics device drivers Kernel routines and portions of the compilers.

EDUCATION:
Purdue University
West Lafayette, IN

  • Master of the Science in Electrical Engineering, May 1987.
  • Bachelor of Science in Computer Engineering, Januray1986.

SKILLS:

Design Tools:
LSI Logic, Synopsys, Verilog, Ikos, Mentor, ABEL, RTL. Programming Languages: Assembler (PDP11, 8086,68000,881000), Basic, c, c++, FORTRAIN, FP, Lisp, PASCAL, Path PASCAL, PL/1,TUTOR.

Operating system and software Environments:
UNIX, AOS/VS, Domain, NOS, PLATO, X-windows,OSF/Motif.